Senior Digital ASIC Design Engineer (m/f/d)

Advantest · Boeblingen, Germany

Last updated Jul 18, 2026 · View original posting

Digital design engineer for CMOS IP architecture development, RTL coding, and silicon verification in an ASIC design environment.

Full Description

Requirements gathering and elicitation for IP
Architecture development for CMOS IP designs
Design and RTL coding of digital and full-custom modules
Verification on module and chip level including test plan/cases generation.
Documentation of implemented functionality
Support for floor-planning and physical design
Collaboration with other functions

University degree, Diploma or BS EE
Background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies and silicon development cycle
Experience in Register Transfer Level (RTL) coding (Verilog)
Experience with standard simulation tools for digital designs
Basic knowledge about UNIX* or Linux* environment and using programming languages
Technical communication, team work and problem solving skills
English language skills

Requirements

Education: BACHELOR

Required

Analog/digital HW simulation and design toolsEnglish LanguageGraphic designIndependent and Team WorkLinuxMicroprocessor designProblem-solvingRegister Transfer Level (RTL) CodingSoC developmentTechnical CommunicationVerilog

Preferred

Digital Design (SOC)Scripting

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