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R&D Engineer

Advantest · India

Design and develop new features for the SiConic platform for semiconductor validation workflows, including test execution optimization, DFT integration, and automation capabilities.

Requirements

Experience: 2+ years

Education: BACHELOR

Required

C++Debug capabilitiesDigital verification tools and methodologiesLinuxProcess optimizationPythonSoftware Design

Preferred

Analytical and data-driven problem-solvingAutomated test fixtures for semiconductor equipmentAutomated Validation WorkflowsDFT calculationsInterpersonal skillsML systems at scaleSemiconductor Industry experienceTitan Platform

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