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Sr. Staff Hardware Engineer (Teradyne, San Jose, CA)

Teradyne · San Jose, CA, US

Lead hardware architecture and design for IC testers in the Memory Tester Business Unit, managing complex multi-board systems from concept through production release.

Requirements

Experience: 8+ years

Education: BACHELOR

Required

Analog circuit designBoard level designCross-functional Team LeadershipDDR high-speed interconnectsEmbedded firmware designHardware/mechanism designHigh-Speed Digital Hardware DesignHigh-speed interfacesLeadershipMentoring and coachingMicroprocessor designPCIe protocolPower design and current regulationPower integrity (PI)SerDesSignal integrity (SI)

Preferred

Design of mechanical parts and assembliesThermal considerations in design

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