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Senior Hardware Engineer (Teradyne, San Jose, CA)

Teradyne · San Jose, CA, US

Hardware design engineer for IC testers in the Memory Tester Business Unit, responsible for board-level design of complex DRAM and Flash memory test systems from concept through production.

Requirements

Experience: 5+ years

Education: BACHELOR

Required

Analog circuit designBoard-level designFPGA simulation and testingHardware/mechanism designHigh-Speed Digital Hardware DesignHigh-speed interconnects (DDR, PCIe, USB, SerDes)Microprocessor designPower design and current regulationPower integrity (PI)Signal integrity (SI)Software Design

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