Principal Hardware Engineer (Teradyne, San Jose, CA)

Teradyne · San Jose, CA, US

Lead hardware architect and system designer for IC memory testers (DRAM and Flash) in a large-scale, multi-board environment, managing end-to-end development from concept through production and customer release.

Requirements

Experience: 12+ years

Education: BACHELOR

Required

Analog circuit designCross-functional Team LeadershipDDREmbedded firmware designHardware/mechanism designHigh-Speed Digital Hardware DesignLeadership and mentoring of engineering teamsMicroprocessor designPCIPower design and current regulationPower integrity (PI)SerDesSignal integrity (SI)USB

Principal Hardware Engineer (Teradyne, San Jose, CA)

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